Room to high temperature measurements of flexible SOI FinFETs with sub-20-nm fins

Handle URI:
http://hdl.handle.net/10754/563900
Title:
Room to high temperature measurements of flexible SOI FinFETs with sub-20-nm fins
Authors:
Diab, Amer El Hajj; Sevilla, Galo T. ( 0000-0002-9419-4437 ) ; Cristoloveanu, Sorin; Hussain, Muhammad Mustafa ( 0000-0003-3279-0441 )
Abstract:
We report the temperature dependence of the core electrical parameters and transport characteristics of a flexible version of fin field-effect transistor (FinFET) on silicon-on-insulator (SOI) with sub-20-nm wide fins and high-k/metal gate-stacks. For the first time, we characterize them from room to high temperature (150 °C) to show the impact of temperature variation on drain current, gate leakage current, and transconductance. Variation of extracted parameters, such as low-field mobility, subthreshold swing, threshold voltage, and ON-OFF current characteristics, is reported too. Direct comparison is made to a rigid version of the SOI FinFETs. The mobility degradation with temperature is mainly caused by phonon scattering mechanism. The overall excellent devices performance at high temperature after release is outlined proving the suitability of truly high-performance flexible inorganic electronics with such advanced architecture.
KAUST Department:
Electrical Engineering Program; Integrated Nanotechnology Lab; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
IEEE Transactions on Electron Devices
Issue Date:
Dec-2014
DOI:
10.1109/TED.2014.2360659
Type:
Article
ISSN:
00189383
Sponsors:
This work was supported by the King Abdullah University of Science and Technology, Jeddah, Saudi Arabia, through the Office of Competitive Research Funds under Grant CRG-1-2012-HUS-008. The review of this paper was arranged by Editor N. Bhat.
Appears in Collections:
Articles; Electrical Engineering Program; Integrated Nanotechnology Lab; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division

Full metadata record

DC FieldValue Language
dc.contributor.authorDiab, Amer El Hajjen
dc.contributor.authorSevilla, Galo T.en
dc.contributor.authorCristoloveanu, Sorinen
dc.contributor.authorHussain, Muhammad Mustafaen
dc.date.accessioned2015-08-03T12:18:53Zen
dc.date.available2015-08-03T12:18:53Zen
dc.date.issued2014-12en
dc.identifier.issn00189383en
dc.identifier.doi10.1109/TED.2014.2360659en
dc.identifier.urihttp://hdl.handle.net/10754/563900en
dc.description.abstractWe report the temperature dependence of the core electrical parameters and transport characteristics of a flexible version of fin field-effect transistor (FinFET) on silicon-on-insulator (SOI) with sub-20-nm wide fins and high-k/metal gate-stacks. For the first time, we characterize them from room to high temperature (150 °C) to show the impact of temperature variation on drain current, gate leakage current, and transconductance. Variation of extracted parameters, such as low-field mobility, subthreshold swing, threshold voltage, and ON-OFF current characteristics, is reported too. Direct comparison is made to a rigid version of the SOI FinFETs. The mobility degradation with temperature is mainly caused by phonon scattering mechanism. The overall excellent devices performance at high temperature after release is outlined proving the suitability of truly high-performance flexible inorganic electronics with such advanced architecture.en
dc.description.sponsorshipThis work was supported by the King Abdullah University of Science and Technology, Jeddah, Saudi Arabia, through the Office of Competitive Research Funds under Grant CRG-1-2012-HUS-008. The review of this paper was arranged by Editor N. Bhat.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectFinFETen
dc.subjectflexibleen
dc.subjectgate leakageen
dc.subjecthigh temperatureen
dc.subjectmobilityen
dc.subjectSilicon-on-insulator (SOI).en
dc.titleRoom to high temperature measurements of flexible SOI FinFETs with sub-20-nm finsen
dc.typeArticleen
dc.contributor.departmentElectrical Engineering Programen
dc.contributor.departmentIntegrated Nanotechnology Laben
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Divisionen
dc.identifier.journalIEEE Transactions on Electron Devicesen
dc.contributor.institutionInstitute of Microelectronics, Electromagnetism and Photonics, Grenoble INP MinatecGrenoble, Franceen
kaust.authorDiab, Amer El Hajjen
kaust.authorSevilla, Galo T.en
kaust.authorHussain, Muhammad Mustafaen
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