A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations

Handle URI:
http://hdl.handle.net/10754/561914
Title:
A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations
Authors:
Rabie, Mohamed A.; Bahgat, Ahmed B G; Ramadan, Khaled S.; Shobak, Hosam; Nasr, Tarek Adel Hosny; Abdelhafez, Mohamed R.; Moustafa, Eslam M.; Anis, Mohab H.
Abstract:
Semi-Dynamic Flip-Flops are widely used in state-of-art microprocessors. Moreover, scaling down traditional CMOS technology faces major challenges which rises the need for new devices for replacement. FinFET technology is a potential replacement due to similarity in both fabrication process and theory of operation to current CMOS technology. Hence, this paper presents the study of Semi Dynamic Flip Flops using both Independent gate and Tied gate FinFET devices in 32nm technology node. Furthermore, it studies the performance of these new circuits under process variations. © 2011 IEEE.
KAUST Department:
Electrical Engineering Program
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
2011 International Conference on Energy Aware Computing
Conference/Event name:
2011 International Conference on Energy Aware Computing, ICEAC 2011
Issue Date:
Nov-2011
DOI:
10.1109/ICEAC.2011.6136674
Type:
Conference Paper
ISBN:
9781467304658
Appears in Collections:
Conference Papers; Electrical Engineering Program

Full metadata record

DC FieldValue Language
dc.contributor.authorRabie, Mohamed A.en
dc.contributor.authorBahgat, Ahmed B Gen
dc.contributor.authorRamadan, Khaled S.en
dc.contributor.authorShobak, Hosamen
dc.contributor.authorNasr, Tarek Adel Hosnyen
dc.contributor.authorAbdelhafez, Mohamed R.en
dc.contributor.authorMoustafa, Eslam M.en
dc.contributor.authorAnis, Mohab H.en
dc.date.accessioned2015-08-03T09:34:00Zen
dc.date.available2015-08-03T09:34:00Zen
dc.date.issued2011-11en
dc.identifier.isbn9781467304658en
dc.identifier.doi10.1109/ICEAC.2011.6136674en
dc.identifier.urihttp://hdl.handle.net/10754/561914en
dc.description.abstractSemi-Dynamic Flip-Flops are widely used in state-of-art microprocessors. Moreover, scaling down traditional CMOS technology faces major challenges which rises the need for new devices for replacement. FinFET technology is a potential replacement due to similarity in both fabrication process and theory of operation to current CMOS technology. Hence, this paper presents the study of Semi Dynamic Flip Flops using both Independent gate and Tied gate FinFET devices in 32nm technology node. Furthermore, it studies the performance of these new circuits under process variations. © 2011 IEEE.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectIndependent-Gate FinFETen
dc.subjectMOSFETen
dc.subjectProcess Variationsen
dc.subjectSemi-Dynamic Flip-Flopen
dc.subjectTied-Gate FinFETen
dc.titleA comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variationsen
dc.typeConference Paperen
dc.contributor.departmentElectrical Engineering Programen
dc.identifier.journal2011 International Conference on Energy Aware Computingen
dc.conference.date2011-11-30 to 2011-12-02en
dc.conference.name2011 International Conference on Energy Aware Computing, ICEAC 2011en
dc.conference.locationIstanbul, TURen
dc.contributor.institutionAmerican University in Cairo, Cairo, Egypten
kaust.authorRamadan, Khaled S.en
kaust.authorBahgat, Ahmed B Gen
kaust.authorNasr, Tarek Adel Hosnyen
All Items in KAUST are protected by copyright, with all rights reserved, unless otherwise indicated.